Embedded Systems

Course Content:

Basic of Electronics :

Aim of the course is to enhance as well as reinforce the knowledge base of electronic components, devices and hardware . The contents of the course supplement the knowledge gained through the learning in the class room. The course is specially designed for the students of engineering of 2nd/3rd year and Diploma engineering. Professionals from fields other than electronics have attended this course . The course is conducted by faculty E assisted by Application Engineers with years of experience in field of electronics . Objectives of the course: To familiarize with commonly used active and passive electronic components To learn the basic building blocks commonly used in making projects To learn soldering , use of test equipment in fault finding . To construct a simple utility project.

Familiarisation with electronic components: Following components will be covered : (a) Resistors Functions , Characteristics , Types and selection criteria (b) Capacitors- Functions , Characteristics , Types and selection criteria (c ) Inductors and transformers (d) Relays , switches ,cables and connectors (e) Diodes, Zener diode,and LEDs (f) Transistors and TRIAC ( Switching action only ) (g) Op Amplifier (h) 555 timer (i) MOSFETS Basic Building Blocks: Following basic building blocks will be covered (a) Rectifier circuit with filter and regulator (b) Switching circuits using transistor (c) Astable and monostable circuits with 555 timer (d) Sine wave, Square wave, comparator and difference amplifier circuits using 741 Op amp . Electronic Workshop Practice: Following aspects will be demonstrated: – (a) Essential components of an Electronic Tool kit that The hobbyist should have (b) Use of multimeter (c) Soldering techniques– fixing of components on a PCB, And soldering them (d) Demonstration of PCB Design Project construction: Construction of a minor but useful project selected by the student from the kits.

PCB Designing:

OVERVIEW OF THE COURSE PCB DESIGN Hands on learning use of Ki-CAD/Eagle PCB design software with an aim to make a PCB layout for an electronic circuit with various components such as a micro-controller, IC, transistor, diode, active and passive components, switches and connectors .The program consists of three main modules

  • Schematic Editor
  • Lay out (PCB Editor)
  • Auto router
  • (a) Basic concepts of Ki-CAD software (b) Installation of Ki-CAD software through net/CD etc. (c) Explanation of schematic Editor (d) Make schematic digram of microcontroler based Ring tone generator (e) Make schematic digram of low cost stop watch Electrical rule check (ERC)
  • Explanation of Layout Editor (a) Make PCB layout from schematic digram microcontroler based Ring tone generator (b) Make PCB layout from schematic digram of low cost stop watch (c) Design rule Check(DRC) check (d) Direct PCB board
  • Auto router (a) Auto making PCB layout through a Schematic circuit digram (b) Generation of Net List, Part list and Pin list (c) Soldering of components (d) Testing of the fabricated PCB

Embedded With C Language Course

Overview of Operating System, File System and Architecture, Different UNIX Commands, Directory Structure, Listing Files and Directories, Links, Wild Card Characters or Meta Characters, File Compression, File Permissions, Communication Commands, Redirection Operators, Pipes and Filters, Exporting Variables, Process and Job Control, Editing Files, Shell Scripting, Operators, Conditional Statements, Looping C Programming Using Linux Operating System, Data Types, Keywords, Variables. Control and Conditional Statements, Functions, Arrays, Pointers, Command Line Arguments, User Defined Data Types • Structure • Unions • Enum, Macros Embedded C Programming, Libararies, System Call; Fork, Clone, Exe C Concepts; Threads, Pthreads, Semaphores, Pipes, Signals, GTK + Tools

Embedded System:

OVERVIEW: COURSE ON PIC18 F4520 MICROCONTROLLER EFY has signed MoU with Microchip Technology Inc. for conducting courses on PICseries of Micro Controllers. Courses are regularly conducted on PIC 18F4520 MCU at EFYTech Centers, Delhi and Hyderabad. The training program aims at:  Detailed Study of the device  Study of on chip and input/output peripherals.  Writing of the codes in assembly language for integration of on chip and input/output peripherals  Extensive practice on use of MPLAB IDE for simulation, debugging and programming of the device.  The program is conducted in form of tutorials and 13 well-designed Lab exercise. Salient features of the program are given below: (a) Detailed Study of hardware of PIC Micro Controller, to include architecture, memory management, I/O ports, Instruction Set and Debugging Techniques. (b) Interfacing with real-time peripherals like LCD, Keypad, EEPROM, UART, Stepper Motor, Relay, DC Motor, ADC, Analog Comparators & PWM. (c) Training on development tools MPLABIDE, MPLAB ICD2 and PICDEM2 of Microchip Technology for simulation, real time debugging and programming. Faculty is Microchip Certified. At the end of the course a CD will be provided with information on Reference manual, Data manual, Library of programs, Programs in C also available

LPC1768 NXP MICROCONTROLLER(ARM CORTEX M3 ARCHITECTURE)

The training program aims at: Detailed Study of the ARM Architecture device, Study of on chip and input/output peripherals. Writing of the codes in C language for integration of on chip and input/output peripherals. Extensive practice on use of KEIL IDE for simulation, debugging and programming of the device. The program is conducted in form of tutorials and 13 well-designed Lab exercise.

Salient features of the program are given below:

(a) Detailed Study of hardware of LPC 1768 Micro Controller, to include architecture, memory management, I/O ports, DMA Process, IPC Mechanism, Timers Concept, Interrupt Methods, ISR Methods, Various Communication Protocol, and Instruction Set.

(b) Interfacing with real-time peripherals like LCD, Keypad, EEPROM, UART, Stepper Motor, Relay, DC Motor, ADC, Analog Comparators & PWM.

(c) Training on development tools KEIL IDE and using JTAG/U-LINK Module for Dumping the code into the IC , real time debugging and programming.

LabVIEW( Labaratory Virtual Instrument Engineering Workbench)

Many engineering measurement, control and manufacturing systems are controlled with a computer. In addition, many consumer products are controlled with a microprocessor, or a programmable logic controller. A key component to these is the software that is used. The software converts information that is meaningful to people into information that is meaningful to equipment that is being operated (and vice versa). This workshop is designed to provide introductory experience with LabVIEW software. LabVIEW software is an industrial strength software tool that is used for many real applications. Gain hands-on experience in modeling, designing, and building powerful, custom measurement and control applications with intuitive graphical programming.

1.Become comfortable with the LabVIEW environment and data flow execution. 2. Learn LabVIEW concepts. 3. Learn how to acquire, save and load data. 4. Work with data types, such as arrays and clusters. 5. Learn how to generate signal (sine, square etc.) and signals processing. 6. Data Acquisition using USB / Serial Protocol. Learn controlling of devices like buzzer, LED, Seven Segment Display and DC motor.

Linux Driver & Embedded Developer

Part1

1) Gnu compiler distribution 2) Managing process address space 3) Posix Threads 4) Linux socket abstraction layer 5) File I/O operations 6) Inter-process communication

Part2

1) Linux kernel programming 2) Interrupt handling 3) Linux driver architecture 4) Block driver subsystem 5) USB Part 3 1) Introduction to embedded Linux 2) Machine emulator and virtualizer 3) U-boot 4) Embedded Drivers 5) Flashing Images

VLSI -(Logic Designing and physical Designing – Front-end + Back-end)

MODULE 1

INTRODUCTION:

Framing Verilog Concepts,The Design Abstraction Hierarchy, Types of Simulation, Types of Languages, Simulation versus Programming,HDL Learning Paradigms, Where To Get More Information, Reference, Manuals,Usenet

INTRODUCTION TO THE VERILOG LANGUAGE:

Identifiers,Escaped Identifiers,White Space,Comments,Numbers,Text Macros,Modules,Semicolons,Value Set,Strengths,Numbers, Values, and Unknowns

STRUCTURAL MODELING:

Primitives,Ports,Ports in Primitives,Ports in Modules,Instances,Hierarchy,Hierarchical Names,Connect by Name,Top-Level Modules,Your First Simulations,Exercise 1 The Hello Simulation,Exercise 2 The 8-Bit Hierarchical Adder

STARTING PROCEDURAL MODELING:

Starting Places for Blocks of Procedural Code,The initial Keyword,The always Keyword,Delays,begin-end Blocks,fork-join Blocks,
Summary of Procedural Timing

SYSTEM TASKS FOR DISPLAYING RESULTS:

What is a System Task?,$display and Its Relatives,Other Commands to Print Results,Writing to Files,Advanced File IO Functions,Setting the Default Radix,Special Characters,The Current Simulation Time,Suppressing Spaces in Your Output,Periodic Printouts,When to Printout Results,A Final System Task,Exercise 3 Printing Out Results from Wires Buried in the Hierarchy

DATA OBJECTS:

Data Objects in Verilog,Nets,Ranges,Implicit Nets,Ports,Regs,Memories,Initial Value of Regs,Integers and Reals,Time and Realtime,Parameters,Events,Strings,Multi-Dimensional Arrays
Accessing Words and Bits of Multi-Dimensional Arrays,Ports and Regs

PROCEDURAL ASSIGNMENTS:

Procedural Assignments, Ports and Regs,Best Practices with Procedural Assignments,Procedural Assignment for Combinatorial Logic,Procedural Assignment for Sequential Logic,Philosophy of Intra-Assignment Delays for Sequential Assignments,Conventions Moving Forward

OPERATORS:

Binary Operators,Unary Operators,Reduction Operators,Ternary Operator,Equality Operators,Concatenations,Logical Versus Bit-Wise Operations,Operations That Are Not Legal On Reals,Working With Strings,Combining Operators,Sizing Expressions,Signed Operations,Signed Constants

CREATING COMBINATORIAL AND SEQUENTIAL LOGIC:

Continuous Assignment,Event Control,The always Block for Combinatorial Logic,Event Control Explained,Summary of Procedural Timing

PROCEDURAL FLOW CONTROL:

The if Statement,The case Statement,Loops,The forever Loop,The repeat Loop,The while Loop,The for Loop,Exercise 4 Using Expressions and case.

TASKS AND FUNCTIONS:

Tasks,Automatic Tasks,Common Uses for Tasks,Functions,Functions and Integers,Automatic Functions,Exercise 5 Functions and Continuous Assignments.

ADVANCED PROCEDURAL MODELING :

Using The Event Data Type,Procedural Continuous Assignments,A Reminder About Ports and Regs,Modeling with Inout Ports,Named Blocks, The Disable Statement,When is a Simulation Done?

USER-DEFINED PRIMITIVES:

Combinatorial Udps,Optimistic Mux,Pessimistic Mux,The Gritty Details,Sequential UDPS,UDP Instances,The Final Details,Exercise 6 Using UDPs.

PARAMETERIZED MODULES:

N-Bit Mux,N-Bit Adder,N By M Mux,N By M Ram,Using Parameterized Modules,Parameter Passing by Name,Parameter Passing by Order,Parameter Passing by Named List,Values of Parameters in Module Instances.

STATE MACHINES:

State Machine Types,State Machine Modeling Style,State Encoding Methods,Default Conditions, Implicit State Machines,Registered And Unregistered Outputs,Factors in Choosing a State Machine Modeling Style,

MODELING TIPS:

Modeling Combinatorial Logic,Combinatorial Models Using Continuous Assignments,Combinatorial Models Using the always Block and regs,Combinatorial Models Using Functions, Modeling Sequential Logic,Sequential Models Using always,Sequential Models Using initial,Sequential Models Using Tasks, Modeling Asynchronous Circuits, Modeling a One-Shot, Modeling Asynchronous Systems, Special-Purpose Models,Two-Dimensional Arrays, Z-Detectors,Multiplier Examples,A Proven, Successful Approach to Modeling.

MODELING STYLE TRADE-OFFS:

Forces That Influence Modeling Style,Evolution of a Model,Modeling Style and Synthesis,Is It Synthesizable?,Learning From Other People’s Mistakes,When To Use Udps,Blocking and Non-Blocking Assignments,

TEST BENCHES AND TEST:

Introduction to Testing,MANAGEMENT,Model Size versus Test Volume,Types of Tests,Functional Testing,Regression Testing,Sign-Off,System Test versus Unit Tests,Creating Test Plans,The Basic Test Cycle,Hardware Setup and Hold and Response Time,The Test Cycle for Combinatorial Models,The Test Cycle for Sequential Models,Self-Checking Test Benches,Response-Driven Stimulus,Test Benches for Inouts,Loading Files into Verilog Memories,Test Benches with No Test Vectors,Using A Script To Run Test Cases,Modeling Bist,The Surround and Capture Method.

MODEL ORGAINZATION:

File Organization,Declaration Organization,ANSI Style ports,Testcase Organization,Including Test Cases,Conditionally Running Rests,Model Reuse,Summary of Model Orgainzation Compile Directives,Pre-defined Text Macros.

COMMON ERRORS:

Mismatched Ports,Missing or Incorrect Declarations,Missing Regs,Missing Widths,Reversed Ranges,Improper Use of Procedural Continuous Assignments,Missing initial or always Blocks,Zero-Delay always Loops,initial Instead of always,Missing Initialization,Overly Complex Code,Unintended Storage,Timing Errors,Negative Setup Time,Zero-Delay Races,Tool Specific Pragmas.

DEBUGGING A DESIGN:

Overview of Functional Debugging,Where Are the Errors?, Universal Techniques,Printing Out Messages,“I am here.”,Values,The Log File,Using Waveforms,Interactive Debugging,Going Interactive,The Prompts,Special Keys in Interactive Mode,Command History,The Key File,Traversing and Observing,Back-Tracing Fan-In,Using force and release.Waveforms, Graphical User Interfaces and Other Conveniences, Catching Problems Later in a Simulation,Isolating Differences in Models, Summary of Debugging.

CODE COVERAGE:

Code Coverage and Test Plans,Code Coverage and Fifos,Code Coverage and State Machines,Code Coverage and Modeling Style,

 Module 2

PART I BASIC DIGITAL CIRCUITS

>>           Gate-level combinational circuit

  • Introduction
  • General description
  • Basic lexical elements and data types -Lexical elements
  • Data types – Four-value system, Data type groups, Number representation, Operators
  • Program skeleton – Port declaration, Program body, Signal declaration, Another example
  • Structural description
  • Testbench
  • Suggested experiments – Code for gate-level greater-than circuit; Code for gate-level binary decoder

>>           Overview of FPGA and EDA software

  • Introduction FPGA – Overview of a general FPGA device; Overview of the Xilinx Spartan3 devices
  • Development flow
  • Overview of the Xilinx ISE project navigator
  • Short tutorial on ISE project navigator- Create the design project and HDL codes,
  • Create a testbench and perform the RTL simulation, Add a constraint file and synthesize and implement the code,
  • Generate and download the configuration file to an FPGA device
  • Short tutorial on the ModelSim HDL simulator
  • Suggested experiments – Gate-level greater-than circuit, Gate-level binary decoder

>>           RT-level combinational circuit

  • Introduction
  • Operators – Arithmetic operators, Shifi operators, Relational and equality operators
  • Bitwise, reduction, and logical operators, Concatenation and replication operators, Conditional operators
  • Operator precedence, Expression bit-length adjustment, Synthesis of and x values
  • Always block for a combinational circuit- Basic syntax and behavior, Procedural assignment, Variable data types, Simple examples
  • If statement- Syntax, Examples
  • Case statement- Syntax, Examples, The case z and case x statements, The full case and parallel case
  • Routing structure of conditional control constructs- Priority routing network, Multiplexing network
  • General coding guidelines for an always block – Common errors in combinational circuit codes, Guidelines
  • Parameter and constant- Constant, Parameter, Use of parameters in Verilog
  • Design examples – Hexadecimal digit to seven-segment LED decoder, Sign-magnitude adder, Barrel shifter, Simplified floating-point adder
  • Suggested experiments -Multifunction barrel shifter, Dual-priority encoder, BCD incrementor, Floating-point greater-than circuit, Floating-point and signed integer conversion circuit, Enhanced floating-point adder

>>           Regular Sequential Circuit

  • Introduction – D FF and register, Synchronous system, Code development
  • HDL code of the FF and register, D FF, Register, Register file, Storage components in a Spartan-3, Device – Xilinx Specific
  • Simple design examples, Shift register, Binary counter and variant
  • Testbench for sequential circuits
  • Case study- LED time-multiplexing circuit, Stopwatch, FIFO buffer
  • Suggested experiments – Programmable square-wave generator, PWM and LED dimmer, Rotating square circuit, Heartbeat circuit, Rotating LED banner circuit, Enhanced stopwatch, Stack

>>           FSM

  • Introduction, Mealy and Moore outputs, FSM representation
  • FSM code development
  • Design examples – Rising-edge detector, Debouncing circuit, Testing circuit
  • Suggested experiments – Dual-edge detector, Alternative debouncing circuit, Parking lot occupancy counter

 

>>           FSMD

  • Introduction- Single RT operation, ASMD chart, Decision box with a register
  • Code development of an FSMD- Debouncing circuit based on RT methodology, Code with explicit data path components, Code with implicit data path components, Comparison, Testing circuit
  • Design examples- Fibonacci number circuit, Division circuit, Binary-to-BCD conversion circuit, Period counter, Accurate low-frequency counter
  • Suggested experiments – Alternative debouncing circuit, BCD-to-binary conversion circuit, Fibonacci circuit with BCD I/O: design approach 1, Fibonacci circuit with BCD I/O: design approach 2, Auto-scaled low-frequency counter, Reaction timer, Babbage difference engine emulation circuit

>>           Selected Topics of Verilog

  • Blocking versus non blocking assignment – Overview, Combinational circuit, Memory element, Sequential circuit with mixed blocking and non blocking, Assignments, Sequential circuit with mixed blocking and non blocking assignments
  • Alternative coding style for sequential circuit – Binary counter, FSM, FSMD
  • Use of the signed data type
  • Use of function in synthesis
  • Additional constructs for test bench development – Always block and initial block, Procedural statements, Timing control, Delay control, Event control, Wait statement, Timescale directive, System functions and tasks, User-defined functions and tasks, Example of a comprehensive test bench
  • Suggested experiments – Shift register with blocking and non blocking assignments, Alternative coding style for BCD counter, Alternative coding style for FIFO buffer, Alternative coding style for Fibonacci circuit, Dual-mode comparator, Enhanced binary counter monitor, Test bench for FIFO buffer

 

PART 2  I/O MODULES

 

>>           UART

  • Introduction
  • UART receiving subsystem – Oversampling procedure, Baud rate generator, UART receiver, Interface circuit
  • UART transmitting subsystem
  • Overall UART system – Complete UART core, UART verification configuration
  • Customizing a UART
  • Suggested experiments – Full-featured UART, UART with an automatic baud rate detection circuit, UART with an automatic baud rate and parity detection circuit, UART-controlled stopwatch, UART-controlled rotating LED banner

>>           PS2 Keyboard

  • Introduction
  • PS2 receiving subsystem – Physical interface of a PS2 port, Device-to-host communication protocol, Design and code
  • PS2 keyboard scan code – Overview of the scan code, Scan code monitor circuit
  • PS2 keyboard interface circuit – Basic design and HDL code, Verification circuit
  • Suggested experiments – Alternative keyboard interface I, Alternative keyboard interface II, PS2 receiving subsystem with watchdog timer, Keyboard-controlled stopwatch, Keyboard-controlled rotating LED banner

>>           PS2 Mouse

  • Introduction
  • PS2 mouse protocol – Basic operation, Basic initialization procedure
  • PS2 transmitting subsystem – Host-to-PS2-device communication protocol, Design and code
  • Bidirectional PS2 interface – Basic design and code, Verification circuit,
  • PS2 mouse interface -Basic design, Testing circuit
  • Suggested experiments -Keyboard control circuit, Enhanced mouse interface, Mouse-controlled seven-segment LED display

>>           External SRAM

  • Introduction
  • Specification of the IS6 1 LV25616AL SRAM – Block diagram and 110 signals, Timing parameters
  • Basic memory controller – Block diagram, Timing requirement, Register file versus SRAM
  • A safe design -ASMD chart, Timing analysis, HDL implementation, Basic testing circuit, Comprehensive SRAM testing circuit
  • More aggressive design -Timing issues, Alternative design I, Alternative design II, Alternative design III, Advanced FPGA features xi1inx specific
  • Suggested experiments – Memory with a 5 12K-by- 16 configuration, Memory with a 1M-by-8 configuration, Memory with an 8M-by-1 configuration, Expanded memory testing circuit, Memory controller and testing circuit for alternative design I, Memory controller and testing circuit for alternative design II, Memory controller and testing circuit for alternative design III, Memory controller with DCM, High-performance memory controller

>>           Xilinx Spartan3 Specific Memory

  • Introduction
  • Embedded memory of Spartan-3 device – Overview, Comparison
  • Method to incorporate memory modules -Memory module via HDL component instantiation, Memory module via Core Generator, Memory module via HDL inference
  • HDL templates for memory inference – Single-port RAM, Dual-port RAM, ROM
  • Suggested experiments – Block-RAM-based FIFO, Block-RAM-based stack, ROM-based sign-magnitude adder, ROM-based sin(x)function, ROM-based sin(x) and cos(x) functions

>>           VGA controller I: graphic

  • Introduction
  • Basic operation of a CRT – VGA port of the S3 board, Video controller,
  • VGA synchronization -Horizontal synchronization, Vertical synchronization, Timing calculation of VGA synchronization signals, HDL implementation, Testing circuit
  • Overview of the pixel generation circuit
  • Graphic generation with an object-mapped scheme – Rectangular objects, Non-rectangular object, Animated object
  • Graphic generation with a bit-mapped scheme – Dual-port, RAM implementation, Single-port RAM implementation
  • Suggested experiments – VGA test pattern generator, SVGA mode synchronization circuit, Visible screen adjustment circuit, Ball-in-a-box circuit, Two-balls-in-a-box circuit – 6 Two-player pong game, Breakout game, Full-screen dot trace, Mouse pointer circuit, Small-screen mouse scribble circuit, Full-screen mouse scribble circuit

>>           VGA controller II: text

  • Introduction
  • Text generation -Character as a tile, Font ROM, Basic text generation circuit, Font display circuit, Font scaling
  • Full-screen text display
  • The complete pong game – Text subsystem, Modified graphic subsystem, Auxiliary counters, Top-level system
  • Suggested experiments – Rotating banner, Underline for the cursor, Dual-mode text display, Keyboard text entry, UART terminal, Square-wave display, Simple four-trace logic analyzer, Complete two-player pong game, Complete breakout game

 

PART Ill PICOBLAZE MICROCONTROLLER XILINX SPECIFIC

>>           PicoBlaze Overview

  • Introduction
  • Customized hardware and customized software – From special-purpose FSMD to general-purpose microcontroller, Application of microcontroller
  • Overview of PicoBlaze -Basic organization,Top-level HDL modules
  • Development flow
  • Instruction set – Programming model, Instruction format, Logical instructions, Arithmetic instructions, Compare and test instructions, Shift and rotate instructions, Data movement instructions, Program flow control instructions, Interrupt related instructions
  • Assembler directives – The KCPSM3 directives, The PBlazeIDE directives

 

>>           PicoBlaze Assembly Code Development

  • Introduction
  • Useful code segments -KCPSM3 conventions, Bit manipulation, Multiple-byte manipulation, Control structure
  • Subroutine development
  • Program development – Demonstration example, Program documentation
  • Processing of the assembly code – Compiling with KCSPM3, Simulation by PBlazeIDE, Reloading code via the JTAG port, Compiling by PBlazeIDE
  • Syntheses with PicoBlaze
  • Suggested experiments – Signed multiplication, Multi-byte multiplication, Barrel shift function, Reverse function, Binary-to-BCD conversion, BCD-to-binary conversion, Heartbeat circuit, Rotating LED circuit, Discrete LED dimmer

>>           PicoBlaze 110 Interface

  • Introduction
  • Output port – Output instruction and timing, Output interface
  • Input port – Input instruction and timing, Input interface
  • Square program with a switch and seven-segment LED display interface – Output interface, Input interface, Assembly code development, HDL code development
  • Square program with a combinational multiplier and UART console -Multiplier interface, UART interface, Assembly code development, HDL code development
  • Suggested experiments – Low-frequency counter I, Low-frequency counter II, Auto-scaled low-frequency counter, Basic reaction timer with a software timer, Basic reaction timer with a hardware timer, Enhanced reaction timer, Small-screen mouse scribble circuit, Full-screen mouse scribble circuit, Enhanced rotating banner, Pong game, Text editor

>>           PicoBlaze Interrupt Interface

  • Introduction
  • Interrupt handling in PicoBlaze  – Software processing, Timing, External interface, Single interrupt request, Multiple interrupt requests
  • Software development considerations – Interrupt as an alternative scheduling scheme, Development of an interrupt service routine
  • Design example – Interrupt interface, Interrupt service routine development, Assembly code development, HDL code development, Suggested experiments – Alternative timer interrupt service routine, Programmable timer, Set-button interrupt service routine, Interrupt interface with two requests, Four-request interrupt controller.

MODULE 3

Introduction Technology scale down Frequency Improvement Increased layers

Reduced power supply

The MOS device

The MOS Logic simulation of the MOS MOS layout

Vertical aspect of the MOS

Static MOS characteristics Dynamic MOS behavior Analog simulation

Mos options

Transmission gate: the perfect switch

Layout considerations

 MOS modeling

The MOS model 1

The MOS model 3

The model BSIM4

Temperature effects on the MOS High frequency behavior of the MOS

The Inverter

The logic Inverter

The CMOS inverter (Power, supply, frequency) Layout design (plasma, latchup)

Simulation of the inverter Views of the process Buffer

3-state inverter

Analog behavior of the inverter

Ring oscillator

Temperature effects

Interconnects Signal propagation Capacitance load Resistance effect Inductance effect Buffers

Clock tree

Supply routing

 Basic Gates

Introduction

From boolean expression to layout NAND gate (micron, sub-micron) OR3 gate

XOR

Complex gates

Multiplexors (Mux-demux) Pulse generator

Arithmetics

Data formats: unsigned, signed fixed

Half adder gate

Full adder gate

4-bit adder Comparator Multiplier ALU

Low power arithmetics

 

Latches RS latch D-Latch

Edge-trigged latch

Latch optimization (conso, speed, fanout) Counter

Project: programmable pulse generator

FPGA

Goals

Mux for FPGA Configurable logic block Look-up table Interconnection

Programmable Interconnection Points

Propagation delay

MEMORIES

The world of Memories

Static RAM memory (4T, 6T) Decoder (low power) Dynamic RAM memory Embedded RAM

Sense ampli

ROM memory EEPROM memory FRAM memory

Analog Cells

Diode connected MOS Voltage reference Current Mirror Amplifiers (Class) Voltage regulator

Wide range amplifier

Charge pump

Noise

RF Analog Cells Osc illators Inductors

Sample & Hold

Mixers

Voltage-controlled Oscillators

PLL project

Power amplifiers

Converters Introduction Converter parameters Sample hold

ADC DAC

Input/Output Interfacing

Level shifter

Pad stucture

Input pad (schmidt, protect, buffer) Output pad (log, analog, multi drive) Pad ring

Packages IBIS LVDS

High performance Ios

SOI

Layout improvements

2D aspects SOI model Simulation Issues

Future & Conclusion

Electrical Engineering

MATLAB Training course

MATLAB programming

Matrices and Arrays:-

Creating and Concatenating Matrices-Matrix Indexing-Getting Information About a Matrix-Resizing and Reshaping Matrices-Shifting and Sorting Matrices-Operating on Diagonal Matrices-Empty Matrices, Scalars, and Vectors-Full and Sparse Matrices-Multidimensional Arrays. programming Fundamentals: Classes (Data Types)-Basic Program Components-Functions and Scripts-Types of Functions-Using Objects-Error Handling-Program Scheduling-Performance-Memory Usage-Programming Tips.

Simulink

Introduction to Simulink:-

Starting Simulink Software-Opening a Model-Loading a Model-Saving a Model-Using the Model Editor-Undoing a Command-Zooming Block Diagrams-Panning Block Diagrams-Viewing Command History-Updating a Block Diagram-Printing a Block Diagram-Ending a Simulink Session-Summary of Mouse and Keyboard Actions.

Modeling Dynamic Systems:-

Working with Sample Times- Referencing a Model-Creating Conditional Subsystems- Modeling Variant Systems- Exploring, Searching, and Browsing Models-Managing configuration Sets-Modeling Best Practices.

Modeling Of Industrial Power electronics and drives

Power Converters:-

Buck Boost converters, Multi level inverters, Matrix converters,z source inverters, THD anlaysis

Control Techniques:-

Pulse Width modulation, space vector modulation, , Zero voltage switching and Zero current switching

Machine Drives:-

Brush less DC (BLDC)Motor, Permanent Magnet Synchronous Machine (PMSM),stepper motor, Switched Reluctance Motor (SRM),direct Torque and indirect flux control, Speed control

Power system and protection

FACTS:-

Basic reactive power compensation devices, Static VAR compensator, Static compensator (STATCOM),Static synchronous series compensator (SSSC) ,unified power flow controller (UPFC), Distributed FACTS(D-FACTS),Active Power filters(APF).

Renewable energy sources

  • Mathematical modeling of Solar panel
  • Wind power generation
  • Dynamic Fuel cell modeling
  • Hydro power generation
  • Tidal power generation

Control systems

  • P,PI,PID controllers
  • Servo mechanism
  • Lead –Lag compensation Techniques
  • Fuzzy controllers
  • Neural networks

ETAP TRAINING

ETAP Over View

  • ETAP Introduction
  • Project settings
  • Components description
  • Libraries

AC Modeling

  • Load Flow Analysis
  • Unbalanced Load Flow Analysis
  • Short circuit analysis
  • Arc Flash analysis
  • Harmonic analysis
  • Motor acceleration analysis
  • Transient stability analysis
  • Optimal capacitor placement
  • Optimal power flow analysis
  • Reliability anlaysis

DC Modeling

  • Load flow analysis
  • Short circuit analysis
  • Battery sizing and discharge

Ground grid system

Underground raceway system

Cable pulling system

Protective Device Coordination